Nipuna wrote:We had about these in BIT Semester 1 Computer Systems 1 subject, Even though I don't have a clear idea
stands for reduced instruction set architecture stands for complex instruction set computing.
Simple and Fixed length instructions Variable length instructions.
Because of this it's easy to design compilers. There are around 10,000 of opcode+operand combinations
so compiler backend have hard time in emitting optimized
instructions, Probablly heuristic algorithms have been used.
Because those algorithms are all NP complete when it comes
Load and Store Architecture. No need a Load and store architecture, you can directly
(read the wiki page on this) access memory.
Instructions can be directly placed into the Instructions are typically grinded into the microcode before
pipeline. putting them into the pipeline.
Have higher number of registers. Have higher number of cache memory cells.
(to load and store) (to increase the performance of memory accessing).
Have high CPI ratio. Low CPI ratio.
(wiki for CPI)
and also one Instruction in CISC matched with many instructions in RISC for a example, take multiply operation.
(did you read about Load Store architecture ?if not this will be geek).
mov eax, ds:[offset memory_loc_1]
mul eax,ds:[offset memory_loc_2]
mov ds:[offset result],eax
Likewise CISC have compat instructions,so it will definitely increase the CPI ratio and discrease the memory
traffic too.And CISC undirectly exploit the same benifits of piplined processors just by griding the CISC
instructions into microcode by the processor front end. ( google for 'microcode' and 'processor font end' ).
So personally what I'm thinking is CISC will dominate the markert, good example is Mac World have already
landed on the CISC x86_64.
In common, CISC chips are relatively slow (compared to RISC chips) per instruction, but use little (less than RISC) instructions. Intel and AMD, for example, develop CISC processors (x86), while Apple and SUN use RISC architecture. Major problem of RISC - they don't afford the widespread compatibility, that x86 chips do.
What is Widespread compatibility which above ZevenZero said?
What is CPI ratio of microprocessor?This is has several location of Sandun's Short note.
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